On Proving Circuit Lower Bounds against the Polynomial-Time Hierarchy
نویسندگان
چکیده
We consider the problem of proving circuit lower bounds against the polynomialtime hierarchy. We first revisit a lower bound given by Kannan [Kan82], and for any fixed integer k > 0, we give an explicit Σp2 language, recognizable by a Σ p 2-machine with running time O(nk 2+k), that requires circuit size > nk. Next, as our main results, we give relativized results showing the difficulty of proving polynomial-size circuit lower bounds for languages in the polynomial-time hierarchy. For providing fair relativized comparisons, we impose a restriction on a simulating machine that it cannot make queries longer than a simulated machine can access. Under this stronger relativization setting, we show, for example, an oracle with which all languages in the polynomial-time hierarchy can be recognized by some polynomial-size circuits. Our proof techniques are based on the decision tree version of the Switching Lemma for constant depth circuits and Nisan-Wigderson pseudorandom generator. We also take this opportunity to publish some unpublished older results of the first author on constant depth circuits, both straight lower bounds and inapproximability results based on decision tree type Switching Lemmas.
منابع مشابه
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عنوان ژورنال:
- SIAM J. Comput.
دوره 33 شماره
صفحات -
تاریخ انتشار 2004